Chips - Chip & System Gallery | Prof. Santhosh Sivasubramani IIT Delhi

Chip & System Gallery

An open gallery of neuromorphic silicon designed at the INTRINSIC Lab, IIT Delhi. Our chips span multiple open and foundry process nodes. The first suite of mixed-signal building blocks - PVT sensing, stochastic LIF inference, on-chip STDP learning, and crossbar programming - was taped out through Tiny Tapeout on the SkyWater SKY130 open node, with further runs underway on GlobalFoundries nodes. Every block is developed on a fully open design flow.

GitHub: Neuromorphic Suite Related Preprints

Tapeout Roadmap

Fabrication runs across open and foundry process nodes.

Fabricated

Tiny Tapeout · SKY130

SkyWater 130 nm · open MPW

Four neuromorphic blocks plus the integrated suite: ring-oscillator PVT sensor, stochastic LIF neuron, STDP controller, and crossbar controller.

Upcoming

GF26A

GlobalFoundries shuttle · 6 tiles · 2026

Next-run neuromorphic designs on a GlobalFoundries shuttle, spanning six tiles. Block-level details to be announced.

Upcoming

GF26B

GlobalFoundries shuttle · 12 tiles · 2026

Follow-on GlobalFoundries shuttle with twelve tiles for scaled and extended neuromorphic blocks. Block-level details to be announced.

Chips

Each card links to its full description and open-source design.

Floorplan of the neuromorphic silicon suite

Neuromorphic Silicon Suite

SkyWater 130 nm · Tiny Tapeout · 2026

Santhosh Sivasubramani

Integrated suite combining PVT sensing, stochastic LIF inference, on-chip STDP learning, and crossbar programming on a single open design.

Full Description GitHub

Layout of the stochastic LIF neuron

Stochastic LIF Neuron

SkyWater 130 nm · Tiny Tapeout · 2026

Santhosh Sivasubramani

LFSR-based stochastic leaky integrate-and-fire neuron with rate coding for probabilistic spiking inference in digital silicon.

Full Description GitHub

Three-factor STDP learning behaviour

On-Chip STDP Controller

SkyWater 130 nm · Tiny Tapeout · 2026

Santhosh Sivasubramani

Spike-timing-dependent plasticity controller that updates synaptic weights on chip from spike-timing correlations.

Full Description GitHub

Crossbar programming finite-state machine

Crossbar Programming Controller

SkyWater 130 nm · Tiny Tapeout · 2026

Santhosh Sivasubramani

Finite-state controller that programs and addresses the synaptic crossbar array, linking the neuron and learning blocks.

Full Description GitHub

Ring-oscillator PVT sensing response

Ring Oscillator & PVT Sensor

SkyWater 130 nm · Tiny Tapeout · 2026

Santhosh Sivasubramani

Ring-oscillator-based process, voltage, and temperature monitor for on-chip frequency sensing and calibration.

Full Description GitHub

GF26A

GF26A (Upcoming)

GlobalFoundries · 6 tiles · 2026

INTRINSIC Lab

Next-run neuromorphic designs on a GlobalFoundries shuttle, spanning six tiles. Block-level details to be announced.

Related Preprints

GF26B

GF26B (Upcoming)

GlobalFoundries · 12 tiles · 2026

INTRINSIC Lab

Follow-on GlobalFoundries shuttle with twelve tiles for scaled and extended neuromorphic blocks. Block-level details to be announced.

Related Preprints

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Open-Source Design Repositories

Four independent Tiny Tapeout designs, each linked as a Git submodule of the suite repository.

Ring Oscillator & PVT Sensor

tt_um_santhosh_ring_osc

A ring-oscillator-based process, voltage, and temperature (PVT) monitor for on-chip frequency sensing and calibration of the neuromorphic blocks.

View on GitHub

Stochastic LIF Neuron

tt_um_santhosh_stoch_neuron

An LFSR-based stochastic leaky integrate-and-fire (LIF) neuron with rate coding, enabling probabilistic spiking inference in digital silicon.

View on GitHub

On-Chip STDP Controller

tt_um_santhosh_stdp_ctrl

A spike-timing-dependent plasticity (STDP) learning controller that updates synaptic weights on chip from spike-timing correlations.

View on GitHub

Crossbar Programming Controller

tt_um_santhosh_xbar_ctrl

A finite-state controller that programs and addresses the synaptic crossbar array, linking the neuron and learning blocks together.

View on GitHub

Related Preprints

Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming

Santhosh Sivasubramani

arXiv | arXiv:2606.22635 | Open-source silicon in SkyWater 130 nm (Tiny Tapeout)

View on arXiv PDF GitHub Suite

An Open-Source LFSR-Based Stochastic Leaky Integrate-and-Fire Neuron in SkyWater 130 nm: Design, Stochastic Characterisation, and Rate Coding

Santhosh Sivasubramani

arXiv | arXiv:2606.23532 | Open-source silicon in SkyWater 130 nm (Tiny Tapeout)

View on arXiv PDF GitHub Repo

Full Description: Neuromorphic Silicon Suite

Architecture, datapaths, measurements, and physical implementation of the full suite. Click any figure to open it at full resolution.

System architecture of the neuromorphic silicon suite — Fig. 1. System architecture of the neuromorphic silicon suite.

SPI register-programming interface timing — Fig. 2. SPI register-programming interface timing.

Stochastic LIF neuron datapath — Fig. 3. Stochastic LIF neuron datapath.

On-chip STDP learning datapath — Fig. 4. On-chip STDP learning datapath.

Crossbar programming finite-state machine — Fig. 5. Crossbar programming finite-state machine.

Measured neuron membrane dynamics — Fig. 6. Neuron membrane dynamics.

STDP weight-update curve — Fig. 7. STDP weight-update curve.

Ring-oscillator PVT sensing response — Fig. 8. Ring-oscillator PVT sensing response.

Standard-cell area utilization — Fig. 9. Standard-cell area utilization.

Configuration register map — Fig. 10. Configuration register map.

Physical floorplan of the suite — Fig. 11. Physical floorplan of the suite.

Crossbar programming timing — Fig. 12. Crossbar programming timing.

Neuron firing-rate transfer characteristic — Fig. 13. Neuron firing-rate transfer characteristic.

Three-factor STDP learning behaviour — Fig. 14. Three-factor STDP learning behaviour.

Full Description: Stochastic LIF Neuron

Design and stochastic characterisation of the LFSR-based stochastic LIF neuron in SkyWater 130 nm. Click any figure to open it at full resolution.

Stochastic LIF neuron architecture — Fig. 1. Stochastic LIF neuron architecture.

LFSR-based stochastic source — Fig. 2. LFSR-based stochastic source.

Stochastic bitstream characterisation — Fig. 3. Stochastic bitstream characterisation.

Stochastic activation characteristic — Fig. 4. Stochastic activation characteristic.

Parameter tuning sweep — Fig. 5. Parameter tuning sweep.

Configuration register map — Fig. 6. Configuration register map.

Physical layout in SkyWater 130 nm — Fig. 7. Physical layout in SkyWater 130 nm.